FIG. 12 is a plan view showing a prior, art hybrid microwave integrated circuit which operates at a frequency of 500 MHz to several GHz. In FIG. 12, reference numeral 1 designates an alumina dielectric substrate which transmits signals in high frequency band. Distributed constant lines 6a and 6b are disposed on the substrate 1. The distributed constant lines 6a and 6b, an inductor 3, and a ground electrode (not shown) on the rear surface of the substrate 1 form a microstrip line. A chip capacitor 8 is disposed on the distributed constant line 6a and connected to the line 6b by a metal wire 5, for example, a gold wire having a diameter of about 25 microns. An FET 7 is disposed on a semiconductor substrate comprising GaAs, Si or the like and connected to the distributed constant line 6a by metal wires 5. The FET 7 comprises a region 7a in which a plurality of drains, gates, and sources alternate with each other, a wiring 7b connected to the drains, and a wiring 7c connected to the gates.
FIG. 13 schematically illustrates the integrate circuit of FIG. 12. In FIG. 13, the same reference numerals as in FIG. 12 designate the same or corresponding parts.
A description is given of the operation.
Signals amplified in the FET 7 are transferred to an LC resonance circuit comprising the capacitor 8 and the inductor 3 through the wiring 7b and the distributed constant line 6a. When the operating frequency of the integrated circuit is f, the LC resonance circuit resonates at a frequency of 2f, i.e., a frequency twice as high as the operating frequency. That is, when the inductance of the inductor 3 is L and the capacitance of the capacitor 4 is C, a value of LC is chosen to satisfy the following equation (1). ##EQU1## Thus, a microwave signal having double frequency 2f is totally reflected by the LC resonance circuit comprising the capacitor 8 and the inductor 3 and returned to the FET 7, whereby the efficiency of the integrated circuit is improved. In this way, the double-frequency component in F-class operation is processed.
Meanwhile, in the above-described hybrid microwave integrated circuit including the LC resonance circuit, the precision of the capacitance of the capacitor 8 is .+-.10%, and the dimensional precision of the inductor 3 is .+-.25 to .+-.50 microns when the inductor is formed on an alumina substrate or the like having a rough surface. Therefore, the resonance frequency fr of the LC resonance circuit comprising the capacitor 8 and the inductor 3 varies by .+-.5 to .+-.10%, resulting in a reduction in the efficiency by several percent and a reduction in the output power by several dBm. The variation in the resonance frequency may be suppressed by increasing the width of the inductor 3 to improve the dimensional precision of the inductor 3. In this case, however, the whole circuit unfavorably increases in size, resulting in high costs.
The integrated circuit shown in FIG. 12 includes an LC resonance circuit processing only the double-frequency component. In order to further improve the efficiency of the device, a plurality of LC resonance circuits resonating at integer multiples of the operating frequency f, i.e., 2f, 3f, 4f, . . . , are formed on the alumina dielectric substrate 1. In this case, however, since a plurality of inductors 3 and capacitors 8 are formed on the substrate 1, the device unfavorably increases in size. In addition, since variations in the resonance frequencies of the respective resonance circuits cause overlapping of the frequencies characteristics of the device, such as efficiency and output power, deteriorate all the more.
FIG. 14 is a cross-sectional view showing a monolithic microwave integrated circuit disclosed in Japanese Published Patent Application No. 3-21101. In FIG. 14, a second semiconductor substrate 32 having a high dielectric constant is disposed on a first semiconductor substrate 31 and a coplanar strip line 33 is disposed on the second substrate 32, whereby the length of the microwave circuit is reduced to miniaturize the device. FIG. 15 is a perspective view showing a semiconductor device disclosed in Japanese Published Patent Application No. 63-111659. In FIG. 15, an IC chip 34 is disposed on an Si substrate and GaAs chips 35 for high frequency operation are disposed on the IC chip 34, whereby a reduction in cost is achieved. However, these prior art devices cannot prevent deterioration in characteristics of ICs, such as efficiency and output power.
Meanwhile, methods for miniaturizing integrated circuits including inductors and capacitors have conventionally been proposed. FIG. 16 is a perspective view showing an MIM (Metal-Insulator-Metal) capacitor disclosed in Japanese Published Patent Application No. 63-48855. In FIG. 16, a capacitor 45 comprises a lower electrode 47, an insulating film 48, and an upper conductive layer 46, and the upper conductive layer 46 also serves as an inductor. In this structure, however, since an LC resonance circuit is formed by the MIM capacitor 45 in which the upper conductive layer 46 also serves as an inductor, a mutual coupling occurs between the inductor and the capacitor, resulting in an undesirable parasitic capacitance. Such a parasitic capacitance adversely affects characteristics of the microwave IC shown in FIG. 12 operating at a frequency of 500 MHz to several GHz. FIG. 17 is a cross-sectional view showing a semiconductor monolithic bias feeder circuit disclosed in Japanese Published Patent Application No. 63-140560. In FIG. 17, the bias feeder circuit comprises a spiral strip line inductor 36 disposed on a substrate, a dielectric insulating layer 37, and an uppermost metal layer 38 connected to a grounding pad. In this bias feeder circuit, however, since the MIM capacitor is disposed on an uneven surface due to the presence of the inductor on the substrate, the resistance of the MIM capacitance to pressure is poor, adversely affecting the characteristics of the device.
FIG. 18 is a plan view showing a microwave integrated circuit including an MIM capacitor disclosed in Japanese Published Patent Application No. 61-259560, in which the capacitance value of the capacitor is optimized after forming the capacitor on the substrate. In FIG. 18, a plurality of upper metal fingers 39 of the capacitor are connected outside of the capacitor region by leading electrodes 40 which join into a single electrode. The capacitance value of the capacitor is controlled by selectively cutting the leading electrodes 40. FIG. 19 is a perspective view showing a semiconductor device disclosed in Japanese Published Patent Application No. 1-308060. In FIG. 19, a plurality of upper metal layers 41 of an MIM capacitor are selectively connected by metal wires or the like to vary the capacitance. In addition, FIG. 20 is a plan view showing a plane and parallel MIM capacitor disclosed in Japanese Published Patent Application No. 2-119260. In FIG. 20, grounding conductor lines 42, which can be cut off in the final stage in the production process, are connected to an upper metal 43 and a lower metal 44. However, in the conventional microwave ICs having LC resonance circuits comprising the inductors and the capacitors shown in FIGS. 18 to 20, it is difficult to obtain a desired resonance frequency of the LC resonance circuit by only controlling the capacitance value of the capacitor, so that precise control of the resonance frequency is not achieved.